Reconfigurable Embedded Communication System
Embedded system
generally includes several radio communication peripherals associated
with a processor. Communication functions are buried in silicon and
cannot be modified. Proposed alternate architecture associates minimal
analog front-end, reconfigurable components (FPGA) and processor. As
digital signal processing is performed inside FPGAs, major changes of
the communication function can be done near instantaneously by
instantiation of virtual peripherals.
Applications include upgrade to
new standards, cognitive radio, support of heterogeneous communication
environment, R&D prototyping, test & measurement operations.
Hardware and software environment
RECOMS project aim is the development of an hardware platform and a Virtual Peripheral Framework
- FPGA interfacing blockset and software - designed for supporting
quick and efficient virtual peripheral developments.
The hardware
platform is composed of a board including an ARM9 processor and a
Xilinx Virtex-5 FPGA - and supporting analog front-end radio modules.
The virtual peripheral framework includes a library of FPGA interface
blocks, a Linux FPGA driver, and a C API library.
Automatic FPGA/processor Interface Generation
FPGA signal processing circuits are assumed to be developed by using
Matlab Simulink. A library of blocks (RECOMS blockset) provides a
complete interfacing between FPGA and processor - including controls,
data transfers, probes, AD/DA and clock management. When RECOMS blocks
are dragged and dropped in a Simulink signal processing diagram,
interface glue and communication ports are automatically generated for instanciating up to 4096 data channels
that support almost any data type, format and rate. Thanks to a virtual
file system, the Linux driver is then dynamically configured.
An API
provides a set of functions - aware of the FPGA design - for
transfering data to/from interfaces blocks with implicite casting. User
would have only to develop high-level applications or services in Linux
User Space - using C, C++, script or QT languages. Switching between
virtual peripherals is performed with an API function by fast
reconfiguration of FPGA, driver and API parameters.
Thanks
to the high abstraction level of the Virtual Peripheral Framework, the
complexity of the Hw/Sw co-design is masked to the developer while
providing a high data rate path between the signal processing hardware
and the upper software layers.
